The SOP package is a component package. Common packaging materials are: plastic, ceramic, glass, metal, etc., and now basically in plastic packaging. It has a wide range of applications and is mainly used in various integrated circuits. SOP (Small Out-Line Package) is a very common form of component. One of the surface mount packages, the leads are gull-winged (L-shaped) from both sides of the package. The materials are plastic and ceramic. It began in the late 1970s. By the through hole insertion (PTH) type before the 1980s, the mainstream product was DIP (Dual In-Line Package), and it progressed to the SOP (Small Out-Line Package) derived from SMT (Surface Mount Technology) technology in the 1980s. , SOJ (Small Out-Line J-Lead), PLCC (PlasTIc Leaded Chip Carrier), QFP (Quad Flat Package) package, after the IC function and the number of I/O pins gradually increased, in 1997, Intel took the lead in QFP packaging. In addition to the BGA (Ball Grid Array) package, the recent mainstream packaging methods are CSP (Chip Scale Package) and Flip Chip. From 1968 to 1969, Philips developed a small outline package (SOP). Later, SOJ (J-type pin small outline package), TSOP (thin small outline package), VSOP (very small outline package), SSOP (reduced type SOP), TSSOP (thin reduced SOP) and SOT (small) were gradually derived. Shape transistor), SOIC (small outline integrated circuit), etc. The SOP package has a wide range of applications, and will gradually be derived from SOJ (J-type small outline package), TSOP (thin small outline package), VSOP (very small outline package), SSOP (reduced SOP), TSSOP (thin The reduced SOP) and SOT (small outline transistor) and SOIC (small outline integrated circuit) play an important role in the integrated circuit. The frequency generator like the motherboard is the SOP package. According to the package form: ordinary double in-line type, ordinary single in-line type, small double row flat, small four-row flat, round metal, large thick film circuit. According to the size of the package, the maximum is thick film circuit, followed by double in-line type, single in-line type, metal package, double row flat, and four rows flat. According to the spacing between the two pins: ordinary standard plastic package, double row, single in-line type is generally 2.54 ± 0.25 mm, followed by 2mm (more common in single in-line type), 1.778 ± 0.25mm (more common in Reduced double in-line type), 1.5±0.25mm, or 1.27±0.25mm (more common in single row with heat sink or single row V), 1.27±0.25mm (more common in double row flat package), 1±0.15mm ( More common in double-row or four-column flat package), 0.8 ± 0.05 ~ 0.15mm (more common in four-row flat package), 0.65 ± 0.03mm (more common in four-column flat package). According to the width between the two columns of the two-in-line type: generally 7.4~7.62mm, 10.16mm, 12.7mm, 15.24mm and so on. Width between two columns (including lead length) according to the double-row flat package: generally 6~6.5±mm, 7.6mm, 10.5~10.65mm, etc. According to the four-column flat package, the length &TImes of 40 pins or more; generally: 10 & TImes; 10mm (excluding lead length), 13.6 & TImes; 13.6 ± 0.4mm (including lead length), 20.6 × 20.6 ± 0.4mm (including lead length) 8.45 × 8.45 ± 0.5 mm (excluding lead length), 14 × 14 ± 0.15 mm (excluding lead length), and the like. The SOP device, also known as SOIC (Small Outline Integrated Circuit), is a reduced form of DIP with a lead center distance of 1.27 mm and materials in both plastic and ceramic. SOP is also called SOL and DFP. SOP package standards are SOP-8, SOP-16, SOP-20, SOP-28, etc. The number behind the SOP indicates the number of pins. The industry often omits the "P", called SO (Small Out-Line). Also derived from SOJ (J-type small outline package), TSOP (thin small outline package), VSOP (very small outline package), SSOP (reduced SOP), TSSOP (thin reduced SOP) and SOT (small form factor) Transistor), SOIC (Small Outline Integrated Circuit), etc. As mentioned above, the following problems exist: The three package names SOIC, SOP, and SO actually refer to different names of a package. Is this the case? According to some data obtained, the size of the SOIC SOP should be different. The pitch of the pins is the same, but the other parameters are different. It is recommended to name the package in the device manual according to the name in the device manual. It is said that each company has its own naming habits. In fact, in the final analysis, the various names are named according to the size of the device... The following is an example of the outline of the MC100ELT22 device manual of ON semi company: Figure 1 MC100ELT22 Dimensions As shown in Figure 1, the external dimensions of each device are nothing more than these parameters. This figure is reserved and used at any time for explanation. The SOP package has many packages, the most common being SSOP, TSOP, TSSOP packages. SSOP - Shrink SOP TSOP - Thin SOP TSSOP - Thin Shrink SOP The most obvious difference between the SSOP and SOP packages is that the SOP package has a pin pitch of 1.27mm (parameter G in Figure 1) and the SSOP has a pitch of 0.65mm. The most obvious difference between the TSOP and SOP packages is the package. The height parameter of the device (parameter C in Figure 1) is different. The so-called TSOP, T is the abbreviation of thin, which is a little thin, this height must be shorter; as for TSSOP, the pitch is small and the body is thin and thin... ... There are also MSOP package, QSOP package, MOP package M has several explanations, some people say that it is Miniature, also said to be Micro, in short, it is a small SOP, the size is smaller than the SOP, the pin spacing is 0.65mm; there is not much information in the QSOP package. Seeing an explanation of Q means Quarter, which means that a quarter of the package has a smaller pitch, which seems to be 0.635mm (to be discussed). This quarter, MOP seems to have a saying that is one-half, this I probably calculated a bit, it seems to refer to the area of ​​the device, can only be said to be an approximation... Note: The pin spacing mentioned above is only when the number of pins is small. When the number of pins is large (generally greater than or equal to 48), the pin pitch will be smaller and become 0.5mm. In addition, the SOIC package is divided into narrow and wide packages. As the name suggests, the difference between the two packages is mainly reflected in the body width of the device (parameter B in Figure 1). When the total number of pins is 14 or 16 and its vicinity Pay special attention to the difference between the two... It must be noted that the parameters in Figure 1 refer to the external dimensions of the device, and we must draw the footprint in the software environment for drawing the PCB when using it. This parameter is somewhat different from the parameters in Figure 1, ( Personally think that the parameters of the footprint must be bigger... Fiber Optic Patch Cord,Fiber Patch Cord,Fiber Patch Cables,Fiber Optic Patch Cable Huizhou Fibercan Industrial Co.Ltd , https://www.fibercannetworks.com
